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CVE-2020-0574

Published: 2020-03-12T21:15Z
Last Modified: 2024-11-21T04:53Z
Source: MITRE CVE List
License: MITRE-CVE-TOS
Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access. > MITRE Terms of Use apply – see LICENSE‑MITRE.txt